TSMC reportedly weighs 20% CoWoS price hike as AI chip demand strains packaging capacity
TSMC is reportedly considering a 20% price increase for its CoWoS advanced packaging services amid tight capacity and extended equipment lead times driven by AI demand.
According to reports from Tom's Hardware citing TrendForce and supply chain sources, TSMC is weighing a price increase of up to 20% for its Chip on Wafer on Substrate (CoWoS) advanced packaging technology. This potential hike reflects strained capacity amid surging artificial intelligence demand and longer delivery times for chipmaking tools. TSMC has yet to confirm the report.
CoWoS is a critical packaging technology that combines logic dies with high-bandwidth memory (HBM), determining the data bandwidth performance of AI accelerators. As Nvidia’s Blackwell and upcoming Rubin chips push integration further, packaging has become one of the tightest bottlenecks in the AI supply chain. Additionally, significantly longer test cycles for Blackwell compared to previous generations are further constraining output.
The report notes that semiconductor equipment lead times have stretched from three to six months to as long as eight months. To ensure timely access to fab equipment, TSMC has reportedly placed this year’s orders at existing prices instead of negotiating discounts, indicating that securing tools on time now matters more than reducing costs.
If the packaging price increase materializes, combined with previously reported potential wafer price hikes of 5-10% for advanced nodes, the overall cost of AI hardware is expected to rise further, likely passing some of these costs down the supply chain.