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TopicDisconfirmAI EditorialUpdated 2026-10-28 13:09

美光内存架构之争

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【背景】美光科技(Micron Technology)正面临关于AI加速器内存需求的核心争论:随着芯片设计趋向“按负载分配内存”(right-sizing),传统的“更多内存等于更好性能”逻辑是否依然成立?

时间线显示,2026年8月,英伟达(Nvidia)被曝因HBM4e供应受限,测试将Rubin Ultra加速器的内存配置从1TB降至192GB-288GB,引发市场对“去规格化”(despec)风险的担忧。同年10月21日,美光首席技术官Scott DeBoer在技术网络研讨会上发布2027路线图,强调新AI内存消耗更多硅片导致供应紧张,并批评竞争对手采用的4F² DRAM设计存在根本问题。然而,10月28日,Chipstrat分析师Austin Lyons指出,美光的回应回避了关键疑问:当训练、预填充和解码分别使用不同芯片时,内存需求的总量与结构将如何变化?他引用谷歌TPU和Positron Asimov等案例说明,客户正在精确配置内存,且HBM每比特消耗的晶圆是DDR5的三倍,位元向LPDDR/GDDR迁移可能改善而非损害美光利润。

分歧在于:美光认为AI工作负载对带宽的需求将持续推高HBM占比,而分析师认为架构优化可能导致总位元需求下降或混合比例改变。截至发稿,美光未对Lyons的具体质疑做出公开回应。投资者需关注2027年下半年美光新DRAM节点量产情况、英伟达Rubin Ultra最终配置以及HBM4e的供应恢复进度。

How it got here

  1. 2026-08-18

    据BofA全球研究报道,英伟达正在测试将Rubin Ultra加速器的HBM配置从计划的1TB降低至192GB-288GB,原因是HBM4e供应限制和资格认证延迟。

    finance.yahoo.com ↗
  2. 2026-10-21

    美光首席技术官Scott DeBoer在网络研讨会上公布2027年技术路线图,称4F² DRAM设计存在根本问题,并指出新AI内存类型每比特消耗更多硅片,导致常规内存供应进一步收紧。

    aciliszili.com ↗
  3. 2026-10-24

    美光公布2026财年第四季度营收为542.3亿美元,同比增长379%,并指引下一季度营收为615亿美元。公司强调其26项战略客户协议旨在打破传统内存周期波动。

    top1markets.com ↗
  4. 2026-10-28

    Chipstrat分析师Austin Lyons发文反驳美光观点,指出客户正根据工作负载(如预填充和解码)精确配置内存,HBM的高晶圆消耗率意味着位元向LPDDR/GDDR迁移可能提升利润率。

    newsletter.chipstrat.com ↗
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What is still unsettled

  • 英伟达Rubin Ultra的最终量产配置是否会维持低内存版本,还是随HBM4e供应恢复回归高容量?
  • 美光能否证明在客户进行‘内存右尺寸’(right-sizing)优化后,其HBM市场份额和利润率仍能保持增长?
  • 美光批评的4F² DRAM设计若被长鑫存储(CXMT)和三星成功商业化,将对美光的3D DRAM路线构成多大竞争压力?

Sources

  • newsletter.chipstrat.comChipstrat: Right-Sizing Memory↗
  • finance.yahoo.comYahoo Finance: Nvidia Cutting Rubin Ultra Memory↗
  • aciliszili.comAciliszili: Micron 2027 Roadmap & 4F² Debate↗
  • top1markets.comTop1Markets: Micron Q4 Earnings & Valuation↗

Coverage in this topic

  • Chip Architecture Allocates Memory by Workload: Chipstrat Analyst Austin Lyons Argues Micron's 'More Memory is Better' Answer Misses the Point2026-10-28News

    After attending a Micron Technology product webinar, Chipstrat analyst Austin Lyons pointed out that Micron executives' response to the question of "despeccing"—claiming that "more memory equals better system performance"—avoided the real issue: how total memory demand and structure will change when training, prefill, and decoding use different chips and different types of memory. Citing examples such as Google's TPU 8i/8t, Nvidia's Rubin CPX, and Positron's Asimov, he noted that customers are already precisely configuring memory according to workloads. Since HBM consumes three times the wafers per bit compared to DDR5 and currently has lower margins, migrating bits from HBM to LPDDR/GDDR could improve rather than harm Micron's profits.