Samsung Chairman Lee Jae-yong Visits Yokohama Advanced Packaging Lab, Prioritizing AI Chip Competitiveness

Samsung Electronics Chairman Lee Jae-yong visited the "Advanced Packaging Lab" (APL) in Yokohama, Japan, on November 1. This marked the first high-level on-site inspection since the lab officially opened on September 8, according to a report by South Korea's Electronic Times. Lee reviewed the progress of next-generation packaging element technology research with scientists and discussed cooperation plans with Japan's materials, parts, and equipment (Sobuja) industry.

Established in 2023, the APL is dedicated to developing and verifying the materials and processes required for advanced semiconductor packaging. Samsung plans to invest 40 billion yen (approximately 350 billion won) over five years starting from 2024 to solidify its local research base. The lab's core role is to connect Samsung's design and manufacturing capabilities with Japan's robust semiconductor supply chain ecosystem.

As competition in AI chips intensifies, advanced packaging has become a critical bottleneck determining the performance of GPUs, High Bandwidth Memory (HBM), and accelerators. Packaging technology directly impacts AI system bandwidth, power efficiency, and thermal performance. During the visit, Lee emphasized that securing advanced packaging technology is central to semiconductor competitiveness in the AI era.

Current R&D priorities at the APL include next-generation processes such as wafer bonding and glass substrates. Glass substrates are considered vital for future packaging due to their higher flatness and thermal stability compared to traditional organic substrates. Additionally, the lab aims to develop new packaging architectures suitable for mass-producing low-power, high-performance AI chips. Samsung plans to cultivate the Yokohama APL as a global hub for advanced packaging R&D, coordinating with domestic semiconductor research institutes.