NVIDIA Holoscan 5 Benchmarks: Pinning Control Partitions to CPU Cores Reduces Tail Latency by 5 to 10 Times
NVIDIA’s technical blog published a gravity compensation tutorial for Holoscan 5, constructing a 400 Hz closed-loop control system using three operators. Measurements with Nsight Systems show that pinning the control partition to dedicated CPU cores reduces C++ p99.99 latency from 86.6 microseconds to 17.2 microseconds, and Python implementation latency from 1373.5 microseconds to 142.6 microseconds.
Gravity compensation is a fundamental validation for robotic torque control: motors continuously calculate and output torques that exactly counteract their own weight, allowing the robotic arm to be guided by hand while feeling weightless.
Holoscan 5 decomposes this loop into three operators: JointStateSourceOp reads the state of seven motors every 2.5 milliseconds; PinocchioGravityOp invokes Pinocchio’s Recursive Newton-Euler Algorithm (RNEA) to compute gravity torques when state data arrives; and MotorCommandSinkOp sends commands to the motors. These three operators are grouped into a single partition named 'control,' where their callbacks execute serially on one thread at runtime, avoiding cross-thread handoffs and unnecessary system calls. The queue depth between operators is set to one with a drop-oldest policy, ensuring that expired samples do not accumulate.
NVIDIA used NVTX annotations in Nsight Systems to measure latency distributions across four configurations. For the C++ implementation, p99.99 latency dropped to 17.2 microseconds when pinned to a CPU core, compared to 86.6 microseconds when unpinned; for the Python implementation, it dropped to 142.6 microseconds when pinned versus 1373.5 microseconds when unpinned. Pinning plus isolation reduced C++ p99.99 latency by approximately 5 times and Python by approximately 9.6 times. Both implementations call the same Pinocchio C++ solver, but the Python version incurs additional overhead from interpreter execution, object allocation, and Global Interpreter Lock (GIL) coordination before and after the solver.