FPGA Vendor Altera Announces Agilex 27: New Platform Features HyperFlow Network and QuartusIQ AI Assistant
Altera launches the Agilex 27, its new high-end FPGA platform, introducing the HyperFlow dedicated data network to reduce routing congestion and the QuartusIQ AI tool to streamline design workflows.
Programmable logic device manufacturer Altera announced the Agilex 27 on October 28, 2026, as the flagship model in its new Agilex 2X product portfolio. Targeting high-performance computing and network infrastructure, the platform integrates hardened 800GbE and 1.6TbE Ethernet interfaces, PCIe 6.0/7.0 support, and configurable transceivers up to 256Gbps.
A key architectural innovation in the Agilex 27 is HyperFlow, a full-chip distributed data network. Altera states that HyperFlow can move data at multi-terabit-per-second rates throughout the FPGA using a dedicated network, thereby avoiding the consumption of soft logic resources or the addition of routing congestion. This allows more FPGA resources to be used for application processing rather than data movement. For example, a 1.6TbE port can ingest traffic via hardened I/O, HyperFlow carries it across the chip, and soft logic focuses on processing. The series also features third-generation HyperFlex registers, which Altera claims deliver a 1.8X generation-over-generation improvement in performance per watt compared to the previous Agilex 7.
In terms of development tools, Altera introduced QuartusIQ, an AI companion for its Quartus Prime software. According to Altera's internal benchmarks, QuartusIQ can speed up design creation by up to 10X and shorten the total design cycle by 1.5X. The tool supports Model Context Protocol (MCP) integration and allows bring-your-own-key setups. At NVIDIA GTC Berlin 2026, the companies announced that QuartusIQ would come to new RTX Station systems, utilizing local NVIDIA Nemotron models to assist with chip design and implementation workflows.
It is important to note that engineering samples for the Agilex 27 are expected in the second half of 2027. While AI-assisted design tools aim to lower the barrier to FPGA usage, there remains a significant gap between announcement and widespread availability. Current performance figures and efficiency gains are based on Altera's internal tests and claims, pending independent verification.