Dwarkesh Podcast interviews Intel executives on chip shapes in 2045 and AI compute bottlenecks
This episode features host Dwarkesh Patel touring US semiconductor company Intel's most advanced fab and speaking with several executives. Guests include Chris Auth, who leads process development, and CTO Pushkar Ranade. They discuss the evolution from planar transistors to gate-all-around (GAA) technology, the use of High-NA EUV lithography, and global chipmaking equipment supply shortages amid surging AI demand.
The Dwarkesh Podcast released this episode on October 22, 2026, titled 'What will computer chips look like in 2045?'. Host Dwarkesh Patel spent two days touring US semiconductor company Intel's most advanced fab and having deep conversations with its technical leadership.
In the program, Chris Auth, who leads development of all processes currently under manufacturing at Intel, explained the development of new nodes like 14A, emphasizing the balance between maintaining schedules and controlling innovation complexity. He reflected on lessons from the 10nm node, noting that overly aggressive innovation led to delays, and introduced how they assess new technology maturity through a 'phase gate' process.
Intel CTO Pushkar Ranade focused on the enormous demand shock from AI. He pointed out that although AI compute demand has tripled annually for the last decade, constrained by equipment capacity from suppliers like ASML, Intel could only double leading-edge wafer production with today's global stock of tools. Ranade also discussed the Terafab partnership with Tesla CEO Elon Musk and the need to rethink fab infrastructure.
Additionally, Tyler Osborn, director in Intel's advanced packaging technology development group, discussed the advantages of hybrid bonding in increasing inter-chip communication density, while Jack Kavalieros from the research lab explored future possibilities like replacing copper interconnects with ruthenium and stacking transistors (CFET).