AMD Zen Original Architect Mike Clark Explains Zen 6 Design Shift: Dense Cores Become Highest IPC Performance Core
In a Chips and Cheese interview, Mike Clark explained the core hierarchy reversal in the Zen 6 family—dense technology (Zen 6c) is no longer an area optimization but has become the highest IPC performance core due to the activation of full L3 cache (4MB per core), while the classic design has been repositioned as the high-frequency variant. He detailed specific decisions including queue expansion to extract additional IPC despite lower frequencies, scheduler trade-offs reducing integer multipliers from three to two, the addition of VNNI pipelines to supplement AI inference, and reduced branch prediction latency.
Mike Clark, AMD's original Zen architect, explained a fundamental design shift during an AMD In-Depth interview with Chips and Cheese: starting with the Zen 6 generation, AMD's dense technology cores are no longer area-optimized products but serve as the highest IPC performance cores. He explicitly stated that while dense technology was previously just an area trade-off, this generation's team leveraged it to add extra IPC within the core. The classic design is now repositioned as the high-frequency version, while dense technology serves as the top-tier performance core because full L3 cache has been enabled in this implementation, providing 4MB per core, totaling 128MB for 32 cores, and delivering the highest achievable IPC.
The mechanism behind this reversal is not mysterious. Clark explained that because Zen 6c targets lower frequencies than the high-frequency cores, it can accommodate more capacity in its queues—the floating-point scheduler is just one example; other queues throughout the core are larger in Zen 6c, aiming to extract more IPC and gain leverage in SMT environments. He simultaneously emphasized a design principle: there should be no software-differentiating delta between the two architectures, meaning the same optimizations apply to both.
Regarding AI inference capabilities, Zen 6 adds two VNNI pipelines on the vector side. Clark admitted this was not the initial design goal—they did not use the term 'agentic' when they began designing. However, Zen 5 had already established a new foundation for AI workloads, and the team always believed the core had a place in AI: orchestration, data type manipulation, and small model inference. Observing the direction of inference workloads, they decided to add VNNI pipelines. Since these are long-cycle projects and the floor plan was already set, this was a relatively late decision, but the team ultimately succeeded in squeezing in the extra pipelines.