TSMC CEO C.C. Wei Confirms Mass Production of 5x Reticle Size Advanced Packaging, Developing 9x and 14x Specs

During TSMC's third-quarter 2026 earnings call, Chairman and CEO C.C. Wei announced that the company has achieved mass production of 5x reticle size advanced packaging, noting that yields are "very excellent." He explicitly stated that, as of now, no other company besides TSMC is able to reach this packaging scale, and customers are very satisfied with the mass production results.

Reticle size refers to the area covered by a single exposure in chip manufacturing. As AI and high-performance computing chips increasingly rely on integrating multiple compute cores and high-bandwidth memory onto a single large substrate, expanding the package area allows for higher compute density and interconnectivity but significantly increases yield control challenges.

Wei also revealed the future technology roadmap: TSMC is developing 9x reticle size packaging and advancing toward 14x. Earlier reports from tech media Anue in August indicated that TSMC's 5.5x reticle size CoWoS packaging had entered high-volume production, with yields for several AI customer products stabilizing above 98%, some reaching 99%. The company plans to expand CoWoS to over 14x reticle sizes by 2029.

Addressing competitive alternatives like Intel's EMIB, Wei did not name specific competitors directly but emphasized that TSMC is prepared to step in if customers cannot secure sufficient advanced packaging capacity elsewhere. He stated that TSMC's primary task is to ensure customers' products launch smoothly, requiring the provision of best-in-class technology and guaranteed capacity.